Quoting Alvin Šipraga (2023-11-24 05:17:44) > From: Alvin Šipraga <alsi@xxxxxxxxxxxxxxx> > > Introduce a new PLL reset mode flag which controls whether or not to > reset a PLL after adjusting its rate. The mode can be configured through > platform data or device tree. > > Since commit 6dc669a22c77 ("clk: si5351: Add PLL soft reset"), the > driver unconditionally resets a PLL whenever its rate is adjusted. > The rationale was that a PLL reset was required to get three outputs > working at the same time. Before this change, the driver never reset the > PLLs. > > Commit b26ff127c52c ("clk: si5351: Apply PLL soft reset before enabling > the outputs") subsequently introduced an option to reset the PLL when > enabling a clock output that sourced it. Here, the rationale was that > this is required to get a deterministic phase relationship between > multiple output clocks. > > This clearly shows that it is useful to reset the PLLs in applications > where multiple clock outputs are used. However, the Si5351 also allows > for glitch-free rate adjustment of its PLLs if one avoids resetting the > PLL. In our audio application where a single Si5351 clock output is used > to supply a runtime adjustable bit clock, this unconditional PLL reset > behaviour introduces unwanted glitches in the clock output. > > It would appear that the problem being solved in the former commit > may be solved by using the optional device tree property introduced in > the latter commit, obviating the need for an unconditional PLL reset > after rate adjustment. But it's not OK to break the default behaviour of > the driver, and it cannot be assumed that all device trees are using the > property introduced in the latter commit. Hence, the new behaviour is > made opt-in. > > Cc: Sebastian Hesselbarth <sebastian.hesselbarth@xxxxxxxxx> > Cc: Rabeeh Khoury <rabeeh@xxxxxxxxxxxxx> > Cc: Jacob Siverskog <jacob@teenage.engineering> > Cc: Sergej Sawazki <sergej@xxxxxxxxxx> > Signed-off-by: Alvin Šipraga <alsi@xxxxxxxxxxxxxxx> > Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@xxxxxxxxx> > --- Applied to clk-next