On Thu, 14 Dec 2023 16:31:07 +0000, Robin Murphy wrote: > Add a binding for implementations of the Arm CoreSight Performance > Monitoring Unit Architecture. Not to be confused with CoreSight debug > and trace, the PMU architecture defines a standard MMIO interface for > event counters following a similar design to the CPU PMU architecture, > where the implementation and most of its features are discoverable > through ID registers. > > CC: Rob Herring <robh+dt@xxxxxxxxxx> > CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx> > CC: Conor Dooley <conor+dt@xxxxxxxxxx> > Signed-off-by: Robin Murphy <robin.murphy@xxxxxxx> > --- > v2: Use reg-io-width instead of a new property; tweak descriptions > --- > .../bindings/perf/arm,coresight-pmu.yaml | 39 +++++++++++++++++++ > 1 file changed, 39 insertions(+) > create mode 100644 Documentation/devicetree/bindings/perf/arm,coresight-pmu.yaml > With the line wrapping fixed: Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
