Re: [PATCH 0/3] arm64: dts: ti: Add Itap Delay Value For High Speed DDR

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On 06/12/23 12:01 am, Kumar, Udit wrote:
Hi Bhavya

On 12/1/2023 1:50 PM, Bhavya Kapoor wrote:
This Series adds Itap Delay Value for DDR52 speed mode for eMMC in
J7200 and for DDR50 speed mode for MMCSD in J721s2 and J784s4 SoC.

Rebased to next-20231201

Bhavya Kapoor (3):
   arm64: dts: ti: k3-j7200-main: Add Itap Delay Value For DDR52 speed
     mode
   arm64: dts: ti: k3-j721s2-main: Add Itap Delay Value For DDR50 speed
     mode
   arm64: dts: ti: k3-j784s4-main: Add Itap Delay Value For DDR50 speed
     mode

Could you confirm, after adding itap values, above modes are working fine apart from

mode detection.

Thanks

Udit

Hi Udit, Below are the links to the test logs

j7200 ddr52 - https://gist.github.com/a0498981/f9b7b7d3592eaca591dec3e72de45585

j721s2 ddr50 - https://gist.github.com/a0498981/9861e1df3fe0fc7c050db4f7a8cc34b8

j784s4 ddr50 - https://gist.github.com/a0498981/7c598dd708424252e2629fe0c7458a6d

Thanks

~B-Kapoor



arch/arm64/boot/dts/ti/k3-j7200-main.dtsi  | 1 +
  arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 1 +
  arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 1 +
  3 files changed, 3 insertions(+)





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