Add documentation for AMD-Xilinx Versal platform Inter Processor Interrupt
controller. Versal IPI controller contains buffer-less IPI which do not
have buffers for message passing. For such IPI channels message buffers
are not expected and only notification to/from remote agent is expected.
Before adding Versal IPI bindings add fix current bindings by adding
xlnx,ipi-id in required property list.
Changes in v3:
- disallow parent node "reg" and "reg-names" properties for old device
- remove cleanup changes for old device and only keep Versal related
changes
- replace zynqmp-mailbox node name with mailbox
- Add blank line before required properties
- Remove extra blank line
Changes in v2:
- Add versal bindings to existing bindings doc instead of separate
file.
- Sort required list same as properties list
- Add minimum and maximum range for xlnx,ipi-id vendor property
- Move vendor property last in the list
- Fix description of child node reg property for versal bindings
- Change commit text
depends on: https://lore.kernel.org/linux-arm-kernel/79f65b96-9015-41c4-b4ee-a82526c9eefc@xxxxxxxxxx/T/#meeacc5c57a9610b19758d313e5b2d17ab470f646
Tanmay Shah (2):
dt-bindings: mailbox: zynqmp: extend required list
dt-bindings: mailbox: add Versal IPI bindings
.../mailbox/xlnx,zynqmp-ipi-mailbox.yaml | 132 ++++++++++++++++--
1 file changed, 119 insertions(+), 13 deletions(-)
base-commit: 48e8992e33abf054bcc0bb2e77b2d43bb899212e
prerequisite-patch-id: 70017c8eaded5fc85749995b9cf093c6c625fab3
--
2.25.1
