> -----Original Message----- > From: Peter Griffin <peter.griffin@xxxxxxxxxx> > Sent: Monday, December 11, 2023 9:53 PM > To: robh+dt@xxxxxxxxxx; krzysztof.kozlowski+dt@xxxxxxxxxx; > mturquette@xxxxxxxxxxxx; conor+dt@xxxxxxxxxx; sboyd@xxxxxxxxxx; > tomasz.figa@xxxxxxxxx; s.nawrocki@xxxxxxxxxxx; linus.walleij@xxxxxxxxxx; > wim@xxxxxxxxxxxxxxxxxx; linux@xxxxxxxxxxxx; catalin.marinas@xxxxxxx; > will@xxxxxxxxxx; arnd@xxxxxxxx; olof@xxxxxxxxx; > gregkh@xxxxxxxxxxxxxxxxxxx; jirislaby@xxxxxxxxxx; > cw00.choi@xxxxxxxxxxx; alim.akhtar@xxxxxxxxxxx > Cc: peter.griffin@xxxxxxxxxx; tudor.ambarus@xxxxxxxxxx; > andre.draszik@xxxxxxxxxx; semen.protsenko@xxxxxxxxxx; > saravanak@xxxxxxxxxx; willmcvicker@xxxxxxxxxx; soc@xxxxxxxxxx; > devicetree@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux- > samsung-soc@xxxxxxxxxxxxxxx; linux-clk@xxxxxxxxxxxxxxx; linux- > gpio@xxxxxxxxxxxxxxx; linux-watchdog@xxxxxxxxxxxxxxx; kernel- > team@xxxxxxxxxxx; linux-serial@xxxxxxxxxxxxxxx > Subject: [PATCH v7 12/16] watchdog: s3c2410_wdt: Add support for Google > gs101 SoC > > This patch adds the compatibles and drvdata for the Google > gs101 SoC found in Pixel 6, Pixel 6a & Pixel 6 pro phones. > > Similar to Exynos850 it has two watchdog instances, one for each cluster and > has some control bits in PMU registers. > > gs101 also has the dbgack_mask bit in wtcon register, so we also enable > QUIRK_HAS_DBGACK_BIT. > > Tested-by: Will McVicker <willmcvicker@xxxxxxxxxx> > Reviewed-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx> > Signed-off-by: Peter Griffin <peter.griffin@xxxxxxxxxx> > --- > drivers/watchdog/s3c2410_wdt.c | 49 > ++++++++++++++++++++++++++++++---- > 1 file changed, 44 insertions(+), 5 deletions(-) > > diff --git a/drivers/watchdog/s3c2410_wdt.c > b/drivers/watchdog/s3c2410_wdt.c index b7a03668f743..c3046610ab5d > 100644 > --- a/drivers/watchdog/s3c2410_wdt.c > +++ b/drivers/watchdog/s3c2410_wdt.c > @@ -69,6 +69,13 @@ > #define EXYNOSAUTOV9_CLUSTER0_WDTRESET_BIT 25 > #define EXYNOSAUTOV9_CLUSTER1_WDTRESET_BIT 24 > > [snip] > static const struct of_device_id s3c2410_wdt_match[] = { > + { .compatible = "google,gs101-wdt", > + .data = &drv_data_gs101_cl0 }, > { .compatible = "samsung,s3c2410-wdt", > .data = &drv_data_s3c2410 }, > { .compatible = "samsung,s3c6410-wdt", @@ -605,9 +640,10 @@ > s3c2410_get_wdt_drv_data(struct platform_device *pdev, struct > s3c2410_wdt *wdt) > } > > #ifdef CONFIG_OF > - /* Choose Exynos850/ExynosAutov9 driver data w.r.t. cluster index > */ > + /* Choose Exynos9 SoC family driver data w.r.t. cluster index */ Exynos9 introduction is out of context here, so you can leave it as original comment, it is not adding anything here. > if (variant == &drv_data_exynos850_cl0 || > - variant == &drv_data_exynosautov9_cl0) { > + variant == &drv_data_exynosautov9_cl0 || > + variant == &drv_data_gs101_cl0) { > u32 index; [snip] > -- > 2.43.0.472.g3155946c3a-goog