On Thu, Dec 7, 2023 at 8:08 AM Claudiu <claudiu.beznea@xxxxxxxxx> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>
> The RZ/G3S Smarc Module has Ethernet PHYs (KSZ9131) connected to each
> Ethernet IP. For this, add proper DT bindings to enable the Ethernet
> communication through these PHYs.
>
> The interface b/w PHYs and MACs is RGMII. The skew settings were set to
> zero as based on phy-mode (rgmii-id) the KSZ9131 driver enables internal
> DLL, which adds a 2ns delay b/w clocks (TX/RX) and data signals.
>
> Different pin settings were applied to TXC and TX_CTL compared with the
> rest of the RGMII pins to comply with requirements for these pins imposed
> by HW manual of RZ/G3S (see chapters "Ether Ch0 Voltage Mode Control
> Register (ETH0_POC)", "Ether Ch1 Voltage Mode Control Register (ETH1_POC)",
> for power source selection, "Ether MII/RGMII Mode Control Register
> (ETH_MODE)" for output-enable and "Input Enable Control Register (IEN_m)"
> for input-enable configurations).
>
> Commit also enables the Ethernet interfaces by selecting
> SW_CONFIG3 = SW_ON.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
> ---
>
> Changes in v2:
> - removed #address-cells, #size-cells
> - adapted patch description to reflect the usage of SW_CONFIG
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in renesas-devel for v6.8.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
