> -----Original Message----- > From: Rob Herring <robh@xxxxxxxxxx> > Sent: 2023年12月9日 4:56 > To: Lucas Stach <l.stach@xxxxxxxxxxxxxx> > Cc: Sherry Sun <sherry.sun@xxxxxxx>; Hongxing Zhu > <hongxing.zhu@xxxxxxx>; lpieralisi@xxxxxxxxxx; kw@xxxxxxxxx; > bhelgaas@xxxxxxxxxx; krzysztof.kozlowski+dt@xxxxxxxxxx; > conor+dt@xxxxxxxxxx; shawnguo@xxxxxxxxxx; s.hauer@xxxxxxxxxxxxxx; > kernel@xxxxxxxxxxxxxx; festevam@xxxxxxxxx; dl-linux-imx <linux- > imx@xxxxxxx>; linux-pci@xxxxxxxxxxxxxxx; linux-arm- > kernel@xxxxxxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux- > kernel@xxxxxxxxxxxxxxx > Subject: Re: [PATCH 2/4] dt-bindings: imx6q-pcie: Add host-wake-gpio > property > > On Fri, Dec 08, 2023 at 11:00:19AM +0100, Lucas Stach wrote: > > Hi Sherry, > > > > Am Freitag, dem 08.12.2023 um 17:13 +0800 schrieb Sherry Sun: > > > Add host-wake-gpio property that can be used to wakeup the host > > > processor. > > > > > > Signed-off-by: Sherry Sun <sherry.sun@xxxxxxx> > > > Reviewed-by: Richard Zhu <hongxing.zhu@xxxxxxx> > > > --- > > > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 4 ++++ > > > 1 file changed, 4 insertions(+) > > > > > > diff --git > > > a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > > > b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > > > index 81bbb8728f0f..944f0f961809 100644 > > > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > > > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml > > > @@ -72,6 +72,10 @@ properties: > > > L=operation state) (optional required). > > > type: boolean > > > > > > + host-wake-gpio: > > > > There is only one wake signal in PCIe and it has a defined direction, > > so there is no point in specifying that it is a host wakeup. Also GPIO > > handles without a traling 's' are deprecated. So this should be > > > > wake-gpios > > Any standard PCI slot signals need to be documented in common PCI schema. > And they should start going into root port nodes rather than the host bridge > node because it's the root ports that correspond to slots rather than the host > bridge. We've just taken shortcuts because many host bridges only have 1 > root port. > > Note that I'm in the middle of splitting pci-bus.yaml into host bridge, PCI-PCI > bridge (and RP), and common device schemas. > Hi Rob, thanks for your comment, I am new to PCIe, can you please provide more details on which common PCI schema the WAKE# property should be added in (maybe snps,dw-pcie.yaml or something else)? Best Regards Sherry
