Revise gpio name for EVT schematic changes Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@xxxxxxxxxx> --- Changelog: - v3 - Correct patch for revising gpio name - v2 - Add patch for revising gpio name --- .../dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts index fdc33bffd467..8b258b128cfe 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts @@ -1414,7 +1414,7 @@ &pinctrl_gpiu4_default &pinctrl_gpiu5_default /*B0-B7*/ "FLT_HSC_SERVER_SLOT8_N","AC_ON_OFF_BTN_CPLD_SLOT5_N", "PWRGD_SLOT1_STBY","PWRGD_SLOT2_STBY", "PWRGD_SLOT3_STBY","PWRGD_SLOT4_STBY","","", - /*C0-C7*/ "PRSNT_NIC3_N","","","","FM_NIC0_WAKE_N", + /*C0-C7*/ "","","","","FM_NIC0_WAKE_N", "FM_NIC1_WAKE_N","","RST_PCIE_SLOT2_N", /*D0-D7*/ "","","","","","","","", /*E0-E7*/ "PRSNT_NIC1_N","PRSNT_NIC2_N","","RST_PCIE_SLOT1_N", @@ -1432,16 +1432,15 @@ &pinctrl_gpiu4_default &pinctrl_gpiu5_default /*K0-K7*/ "","","","","","","","", /*L0-L7*/ "","","","","","","ALT_MEDUSA_P12V_EFUSE_N","", /*M0-M7*/ "EN_NIC0_POWER_BMC_R","EN_NIC1_POWER_BMC_R", - "INT_MEDUSA_IOEXP_TEMP_N","FLT_P12V_NIC0_N", + "INT_MEDUSA_IOEXP_TEMP_N","PRSNT_NIC3_N", "INT_SMB_BMC_SLOT1_4_BMC_N", "AC_ON_OFF_BTN_CPLD_SLOT6_N","","", /*N0-N7*/ "FLT_HSC_SERVER_SLOT1_N","FLT_HSC_SERVER_SLOT2_N", "FLT_HSC_SERVER_SLOT3_N","FLT_HSC_SERVER_SLOT4_N", - "FM_BMC_READY_R2","FLT_P12V_STBY_BMC_N","","", + "FM_BMC_READY_R2","RST_SMB_NIC0_R_N","","", /*O0-O7*/ "AC_ON_OFF_BTN_CPLD_SLOT8_N","RST_SMB_NIC1_R_N", "RST_SMB_NIC2_R_N","RST_SMB_NIC3_R_N", - "FLT_P3V3_NIC2_N","FLT_P3V3_NIC3_N", - "","", + "","","","", /*P0-P7*/ "ALT_SMB_BMC_CPLD1_N","'BTN_BMC_R2_N", "EN_P3V_BAT_SCALED_R","PWRGD_P5V_USB_BMC", "FM_BMC_RTCRST_R","RST_USB_HUB_R_N", @@ -1459,9 +1458,8 @@ &pinctrl_gpiu4_default &pinctrl_gpiu5_default "","ALT_P12V_AUX_N","FAST_PROCHOT_N", "SPI_WP_DISABLE_STATUS_R_N", /*T0-T7*/ "","","","","","","","", - /*U0-U7*/ "","","FLT_P3V3_NIC1_N","FLT_P12V_NIC1_N", - "FLT_P12V_NIC2_N","FLT_P12V_NIC3_N", - "FLT_P3V3_NIC0_N","", + /*U0-U7*/ "","","RST_PCIE_SLOT3_N","", + "","PRSNT_NIC0_N","","", /*V0-V7*/ "FM_RESBTN_SLOT5_BMC_N","FM_RESBTN_SLOT6_BMC_N", "FM_RESBTN_SLOT7_BMC_N","FM_RESBTN_SLOT8_BMC_N", "","","","", -- 2.25.1