From: Elad Nachman <enachman@xxxxxxxxxxx>
Add support for CN9130 and CN9131 COM Express Type 7 CPU
module boards by Marvell.
Add device tree bindings for this board.
Define these COM Express CPU modules as dtsi, and
provide a dtsi file for a carrier board (Marvell AC5X RD
COM Express type 7 carrier board).
This Carrier board only utilizes the PCIe link, hence no
special device / driver support is provided by this dtsi file.
Finally, add dts file for the combined carrier and CPU module.
v7:
1) update MAINTAINERS file to contain all marvell arm64
dts file in one line, covering all files
2) Add Documentation to carrier dtsi and combined carrier
and CPU module dts, explaining the configuration and
modes of operations of the carrier and the combined
system.
v6:
1) Add cn9130 COM Express system
2) Drop with from compatibility name of COM Express system
3) Fix indentation issues of dt bindings
v5:
1) List only carrier compatibility on carrier dtsi
2) Fix dt_bindings_check warnings using latest yamllint/dtschema
3) Fix subject lines to remove unnecessary wordings.
4) Remove dt bindings for standalone CPU modules
5) Move CN913x dt bindings to A7K dt bindings file
6) Fix dtbs_check warnings for dtb and bindings,
using latest yamllint/dtschema.
7) Move memory definition to main dts file, as memory
is socket based.
v4:
1) reorder patches - dt bindings before dts/dtsi files
2) correct description in dt bindings
3) separate dt bindings for CPU module, carrier and combination
4) make carrier board dts into dtsi, make dts for combination of
carrier and CPU module
5) correct compatibility strings and file names to use dashes
instead of underscores
v3:
1) Remove acronym which creates warnings for checkpatch.pl
2) Correct compatibility string for ac5x rd board
3) Add above compatibility string to dt bindings
4) update MAINTAINERS file with ac5 series dts files
5) remove memory property from carrier dts
6) add comment explaining that OOB RGMII ethernet port
connector and PHY are both on CPU module
v2:
1) add compatibility string for the board
2) remove unneeded hard-coded PHY LED blinking mode initialization
3) Split the CPU portion of the carrier board to
dtsi files, and define a dts file for the AC5X RD
carrier board.
Elad Nachman (3):
MAINTAINERS: add ac5 to list of maintained Marvell dts files
dt-bindings: arm64: add Marvell COM Express boards
arm64: dts: cn913x: add device trees for COM Express boards
.../bindings/arm/marvell/armada-7k-8k.yaml | 24 ++++
MAINTAINERS | 3 +-
arch/arm64/boot/dts/marvell/Makefile | 1 +
.../dts/marvell/ac5x-rd-carrier-cn9131.dts | 44 +++++++
.../boot/dts/marvell/ac5x-rd-carrier.dtsi | 34 ++++++
.../dts/marvell/cn9130-db-comexpress.dtsi | 96 ++++++++++++++++
.../dts/marvell/cn9131-db-comexpress.dtsi | 108 ++++++++++++++++++
7 files changed, 308 insertions(+), 2 deletions(-)
create mode 100644 arch/arm64/boot/dts/marvell/ac5x-rd-carrier-cn9131.dts
create mode 100644 arch/arm64/boot/dts/marvell/ac5x-rd-carrier.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi
--
2.25.1
