This patchset adds support for the X1E80100 eDP/DP PHY and documents its compatible. This patchset depends on the QSERDES_V6_COM_SSC_ADJ_PER1 register offset added by the following patchset: https://lore.kernel.org/all/20231122-phy-qualcomm-v6-v6-20-v7-new-offsets-v1-0-d9340d362664@xxxxxxxxxx/ Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx> --- Changes in v2: - Added Krzysztof's R-b tag - Re-worded commit message for bindings to suggest same PHY can work in both eDP and DP mode rather than being different PHY types. - Implemented different qcom_edp_configure_ssc and qcom_edp_configure_pll for each version of the PHY. - Dropped the cfg8 override in qcom_edp_phy_init - Used enum instead of defines for PHY versions - Link to v1: https://lore.kernel.org/r/20231122-phy-qualcomm-edp-x1e80100-v1-0-a9938990edb3@xxxxxxxxxx --- Abel Vesa (2): dt-bindings: phy: qcom-edp: Add X1E80100 PHY compatibles phy: qcom: edp: Add X1E80100 eDP and DP PHYs .../devicetree/bindings/phy/qcom,edp-phy.yaml | 2 + drivers/phy/qualcomm/phy-qcom-edp.c | 230 +++++++++++++++++++-- 2 files changed, 214 insertions(+), 18 deletions(-) --- base-commit: 629a3b49f3f957e975253c54846090b8d5ed2e9b change-id: 20231122-phy-qualcomm-edp-x1e80100-a57c15fff32b Best regards, -- Abel Vesa <abel.vesa@xxxxxxxxxx>
