On 30.11.2023 20:26, Sibi Sankar wrote: > From: Rajendra Nayak <quic_rjendra@xxxxxxxxxxx> > > Add base dtsi and QCP board (Qualcomm Compute Platform) dts file for > X1E80100 SoC, describing the CPUs, GCC and RPMHCC clock controllers, > geni UART, interrupt controller, TLMM, reserved memory, interconnects, > SMMU and LLCC nodes. > > Co-developed-by: Abel Vesa <abel.vesa@xxxxxxxxxx> > Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx> > Signed-off-by: Rajendra Nayak <quic_rjendra@xxxxxxxxxxx> > Co-developed-by: Sibi Sankar <quic_sibis@xxxxxxxxxxx> > Signed-off-by: Sibi Sankar <quic_sibis@xxxxxxxxxxx> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> Konrad
