Hello Krzysztof, > On 23/11/2023 16:26, Gregory CLEMENT wrote: >> The MIPS Warrior I-class I6500 was announced by Imagination >> Technologies in 2016 and is used in the Mobileye SoC EyeQ5. >> >> Acked-by: Arnd Bergmann <arnd@xxxxxxxx> >> Reviewed-by: Philippe Mathieu-Daudé <philmd@xxxxxxxxxx> >> Signed-off-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxx> >> --- >> Documentation/devicetree/bindings/mips/cpus.yaml | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/Documentation/devicetree/bindings/mips/cpus.yaml b/Documentation/devicetree/bindings/mips/cpus.yaml >> index cf382dea3922c..b5165cf103e94 100644 >> --- a/Documentation/devicetree/bindings/mips/cpus.yaml >> +++ b/Documentation/devicetree/bindings/mips/cpus.yaml >> @@ -39,6 +39,7 @@ properties: >> - mti,mips24KEc >> - mti,mips14KEc >> - mti,mips14Kc >> + - img,i6500 > > Don't break the order of entries. Do you mean alphabetic order ? because actually the entries are not really in alphabetic order. Should I send first, a patch like the following one ? diff --git a/Documentation/devicetree/bindings/mips/cpus.yaml b/Documentation/devicetree/bindings/mips/cpus.yaml index cf382dea3922c..9bc47868d28b6 100644 --- a/Documentation/devicetree/bindings/mips/cpus.yaml +++ b/Documentation/devicetree/bindings/mips/cpus.yaml @@ -23,22 +23,22 @@ properties: - brcm,bmips4380 - brcm,bmips5000 - brcm,bmips5200 - - ingenic,xburst-mxu1.0 - ingenic,xburst-fpu1.0-mxu1.1 - ingenic,xburst-fpu2.0-mxu2.0 + - ingenic,xburst-mxu1.0 - ingenic,xburst2-fpu2.1-mxu2.1-smt - loongson,gs264 - mips,m14Kc - - mips,mips4Kc - - mips,mips4KEc - - mips,mips24Kc + - mips,mips1004Kc - mips,mips24KEc + - mips,mips24Kc + - mips,mips4KEc + - mips,mips4Kc - mips,mips74Kc - - mips,mips1004Kc - mti,interaptiv - - mti,mips24KEc - mti,mips14KEc - mti,mips14Kc + - mti,mips24KEc reg: maxItems: 1 Regards, Gregory > > Best regards, > Krzysztof > -- Gregory Clement, Bootlin Embedded Linux and Kernel engineering http://bootlin.com