The GCC block on SM6115 is powered by the VDD_CX rail. We need to ensure that CX is enabled to prevent unwanted power collapse and that the reference is dropped when unused so that the system can enter a firmware-managed lower power state. Enable runtime PM to keep the power flowing only when necessary. Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> --- drivers/clk/qcom/gcc-sm6115.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/drivers/clk/qcom/gcc-sm6115.c b/drivers/clk/qcom/gcc-sm6115.c index 87a2bfe222a3..3e0a3fd09718 100644 --- a/drivers/clk/qcom/gcc-sm6115.c +++ b/drivers/clk/qcom/gcc-sm6115.c @@ -9,6 +9,7 @@ #include <linux/of.h> #include <linux/platform_device.h> #include <linux/clk-provider.h> +#include <linux/pm_runtime.h> #include <linux/regmap.h> #include <linux/reset-controller.h> @@ -3384,14 +3385,26 @@ static int gcc_sm6115_probe(struct platform_device *pdev) struct regmap *regmap; int ret; + ret = devm_pm_runtime_enable(&pdev->dev); + if (ret) + return ret; + + ret = pm_runtime_resume_and_get(&pdev->dev); + if (ret) + return ret; + regmap = qcom_cc_map(pdev, &gcc_sm6115_desc); - if (IS_ERR(regmap)) + if (IS_ERR(regmap)) { + pm_runtime_put(&pdev->dev); return PTR_ERR(regmap); + } ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks, ARRAY_SIZE(gcc_dfs_clocks)); - if (ret) + if (ret) { + pm_runtime_put(&pdev->dev); return ret; + } clk_alpha_pll_configure(&gpll8, regmap, &gpll8_config); clk_alpha_pll_configure(&gpll9, regmap, &gpll9_config); @@ -3406,7 +3419,10 @@ static int gcc_sm6115_probe(struct platform_device *pdev) qcom_branch_set_clk_en(regmap, 0x36004); /* GCC_GPU_CFG_AHB_CLK */ qcom_branch_set_clk_en(regmap, 0x2b06c); /* GCC_SYS_NOC_CPUSS_AHB_CLK */ - return qcom_cc_really_probe(pdev, &gcc_sm6115_desc, regmap); + ret = qcom_cc_really_probe(pdev, &gcc_sm6115_desc, regmap); + pm_runtime_put(&pdev->dev); + + return ret; } static struct platform_driver gcc_sm6115_driver = { -- 2.43.0