> -----Original Message----- > From: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> > Sent: Wednesday, November 29, 2023 4:27 PM > To: JeeHeng Sia <jeeheng.sia@xxxxxxxxxxxxxxxx>; kernel@xxxxxxxx; robh+dt@xxxxxxxxxx; krzysztof.kozlowski+dt@xxxxxxxxxx; > krzk@xxxxxxxxxx; conor+dt@xxxxxxxxxx; paul.walmsley@xxxxxxxxxx; palmer@xxxxxxxxxxx; aou@xxxxxxxxxxxxxxxxx; > daniel.lezcano@xxxxxxxxxx; tglx@xxxxxxxxxxxxx; conor@xxxxxxxxxx; anup@xxxxxxxxxxxxxx; gregkh@xxxxxxxxxxxxxxxxxxx; > jirislaby@xxxxxxxxxx; michal.simek@xxxxxxx; Michael Zhu <michael.zhu@xxxxxxxxxxxxxxxx>; drew@xxxxxxxxxxxxxxx > Cc: devicetree@xxxxxxxxxxxxxxx; linux-riscv@xxxxxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; Leyfoon Tan > <leyfoon.tan@xxxxxxxxxxxxxxxx> > Subject: Re: [PATCH v2 2/6] dt-bindings: riscv: Add StarFive JH8100 SoC > > On 29/11/2023 07:00, Sia Jee Heng wrote: > > Add device tree bindings for the StarFive JH8100 RISC-V SoC. > > > > Signed-off-by: Sia Jee Heng <jeeheng.sia@xxxxxxxxxxxxxxxx> > > Reviewed-by: Ley Foon Tan <leyfoon.tan@xxxxxxxxxxxxxxxx> > > --- > > Documentation/devicetree/bindings/riscv/starfive.yaml | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml > > index cc4d92f0a1bf..7e2da9eef3db 100644 > > --- a/Documentation/devicetree/bindings/riscv/starfive.yaml > > +++ b/Documentation/devicetree/bindings/riscv/starfive.yaml > > @@ -29,7 +29,10 @@ properties: > > - starfive,visionfive-2-v1.2a > > - starfive,visionfive-2-v1.3b > > - const: starfive,jh7110 > > - > > + - items: > > + - enum: > > + - starfive,jh8100-evb > > + - const: starfive,jh8100 > > Why did you remove the blank line? No need for doing that. Noted. Will fix it. > > > additionalProperties: true > > > > ... > > Best regards, > Krzysztof
