On Wed, Nov 22, 2023 at 08:54:13PM +0800, Andy Yan wrote:
> From: Andy Yan <andy.yan@xxxxxxxxxxxxxx>
>
> At first we thought the half_block_en bit in AFBCD_CTRL register
> only work in afbc mode. But the fact is that it control the line
> buffer in all mode(afbc/tile/line), so we need configure it in
> all case.
>
> Signed-off-by: Andy Yan <andy.yan@xxxxxxxxxxxxxx>
Reviewed-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
Sascha
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 25 ++++++++++++++------
> 1 file changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> index 57784d0a22a6..639dfebc6bd1 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> @@ -521,6 +521,18 @@ static bool rockchip_vop2_mod_supported(struct drm_plane *plane, u32 format,
> return vop2_convert_afbc_format(format) >= 0;
> }
>
> +/*
> + * 0: Full mode, 16 lines for one tail
> + * 1: half block mode, 8 lines one tail
> + */
> +static bool vop2_half_block_enable(struct drm_plane_state *pstate)
> +{
> + if (pstate->rotation & (DRM_MODE_ROTATE_270 | DRM_MODE_ROTATE_90))
> + return false;
> + else
> + return true;
> +}
> +
> static u32 vop2_afbc_transform_offset(struct drm_plane_state *pstate,
> bool afbc_half_block_en)
> {
> @@ -1144,6 +1156,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> bool rotate_90 = pstate->rotation & DRM_MODE_ROTATE_90;
> struct rockchip_gem_object *rk_obj;
> unsigned long offset;
> + bool half_block_en;
> bool afbc_en;
> dma_addr_t yrgb_mst;
> dma_addr_t uv_mst;
> @@ -1236,6 +1249,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> dsp_info = (dsp_h - 1) << 16 | ((dsp_w - 1) & 0xffff);
>
> format = vop2_convert_format(fb->format->format);
> + half_block_en = vop2_half_block_enable(pstate);
>
> drm_dbg(vop2->drm, "vp%d update %s[%dx%d->%dx%d@%dx%d] fmt[%p4cc_%s] addr[%pad]\n",
> vp->id, win->data->name, actual_w, actual_h, dsp_w, dsp_h,
> @@ -1243,6 +1257,9 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> &fb->format->format,
> afbc_en ? "AFBC" : "", &yrgb_mst);
>
> + if (vop2_cluster_window(win))
> + vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, half_block_en);
> +
> if (afbc_en) {
> u32 stride;
>
> @@ -1283,13 +1300,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
> vop2_win_write(win, VOP2_WIN_AFBC_UV_SWAP, uv_swap);
> vop2_win_write(win, VOP2_WIN_AFBC_AUTO_GATING_EN, 0);
> vop2_win_write(win, VOP2_WIN_AFBC_BLOCK_SPLIT_EN, 0);
> - if (pstate->rotation & (DRM_MODE_ROTATE_270 | DRM_MODE_ROTATE_90)) {
> - vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, 0);
> - transform_offset = vop2_afbc_transform_offset(pstate, false);
> - } else {
> - vop2_win_write(win, VOP2_WIN_AFBC_HALF_BLOCK_EN, 1);
> - transform_offset = vop2_afbc_transform_offset(pstate, true);
> - }
> + transform_offset = vop2_afbc_transform_offset(pstate, half_block_en);
> vop2_win_write(win, VOP2_WIN_AFBC_HDR_PTR, yrgb_mst);
> vop2_win_write(win, VOP2_WIN_AFBC_PIC_SIZE, act_info);
> vop2_win_write(win, VOP2_WIN_AFBC_TRANSFORM_OFFSET, transform_offset);
> --
> 2.34.1
>
>
>
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