QCA8084 is four-port PHY with maximum link capability 2.5G, which supports the interface mode qusgmii and sgmii mode, there are two PCSs available to connected with ethernet port. QCA8084 can work in switch mode or PHY mode. For switch mode, both PCS0 and PCS1 work on sgmii mode. For PHY mode, PCS1 works on qusgmii mode. The fourth PHY connected with PCS0 works on sgmii mode. Besides this PHY driver patches, the PCS driver is also needed to bring up the qca8084 device, which mainly configurs PCS and clocks. Changes in v3: * pick the two patches to introduce the interface mode 10g-qxgmii from Vladimir Oltean(olteanv@xxxxxxxxx). * add the function phydev_id_is_qca808x to identify the PHY qca8081 and qca8084. * update the interface mode name PHY_INTERFACE_MODE_QUSGMII to PHY_INTERFACE_MODE_10G_QXGMII. Changes in v4: * remove the following patch: <net: phylink: move phylink_pcs_neg_mode() to phylink.c>. * split out 10g_qxgmii change of ethernet-controller.yaml. Changes in v5: * update the author of the patch below. <introduce core support for phy-mode = "10g-qxgmii">. Changes in v6: * drop the "inline" keyword. * apply the patches with "--max-line-length=80". Luo Jie (4): net: phy: at803x: add QCA8084 ethernet phy support net: phy: at803x: add the function phydev_id_is_qca808x net: phy: at803x: Add qca8084_config_init function net: phy: qca8084: add qca8084_link_change_notify Vladimir Oltean (2): net: phy: introduce core support for phy-mode = "10g-qxgmii" dt-bindings: net: ethernet-controller: add 10g-qxgmii mode .../bindings/net/ethernet-controller.yaml | 1 + Documentation/networking/phy.rst | 6 + drivers/net/phy/at803x.c | 139 +++++++++++++++++- drivers/net/phy/phy-core.c | 1 + drivers/net/phy/phylink.c | 11 +- include/linux/phy.h | 4 + include/linux/phylink.h | 2 + 7 files changed, 156 insertions(+), 8 deletions(-) base-commit: 8c9660f6515396aba78d1168d2e17951d653ebf2 -- 2.42.0
