All Xilinx boards can hosts also soft core CPUs like MicroBlaze or
MicroBlaze V (RISC-V ISA) that's why move boar description from arm folder
to soc folder.
Similar chagne was done for Renesas by commit c27ce08b806d ("dt-bindings:
soc: renesas: Move renesas.yaml from arm to soc").
Signed-off-by: Michal Simek <michal.simek@xxxxxxx>
---
Changes in v2:
- New patch in the series
Based on discussion here.
https://lore.kernel.org/r/20231108-copper-scoff-b4de5febb954@spud
---
.../devicetree/bindings/{arm => soc/xilinx}/xilinx.yaml | 0
MAINTAINERS | 1 +
2 files changed, 1 insertion(+)
rename Documentation/devicetree/bindings/{arm => soc/xilinx}/xilinx.yaml (100%)
diff --git a/Documentation/devicetree/bindings/arm/xilinx.yaml b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml
similarity index 100%
rename from Documentation/devicetree/bindings/arm/xilinx.yaml
rename to Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml
diff --git a/MAINTAINERS b/MAINTAINERS
index ea790149af79..14ad00009a63 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3020,6 +3020,7 @@ F: Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml
F: Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml
F: Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml
F: Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml
+F: Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml
F: Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml
F: arch/arm/mach-zynq/
F: drivers/clocksource/timer-cadence-ttc.c
--
2.36.1
