On 13/11/2023 15:00, Jisheng Zhang wrote: > On Mon, Nov 13, 2023 at 01:36:54PM +0000, Conor Dooley wrote: >> On Mon, Nov 13, 2023 at 08:55:00AM +0800, Jisheng Zhang wrote: >>> Add devicetree binding for Sophgo CV1800B SoC reset controller. >>> >>> Signed-off-by: Jisheng Zhang <jszhang@xxxxxxxxxx> >> >> With the unterminated ifndef that was pointed out by the robots fixed, >> Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> >> >>> +/* 0-1 */ >>> +/* 10 */ >>> +/* 13 */ >>> +/* 15 */ >>> +/* 17 */ >>> +/* 36-39 */ >>> +/* 53-57 */ >>> +/* 59-60 */ >>> +/* 63-73 */ >>> +/* 90 */ >>> +/* 94 */ >>> +/* 102-292 */ >> >> There are quite a lot of gaps here, do you know why that is? > > The tail bits are for cpusys, so I guess the SoC designer want to > seperate them with guard? I'm not sure. > There is misunderstanding here. You add here IDs, which are abstract. Any gaps do not make any sense for bindings. Best regards, Krzysztof
