On 10/11/2023 07:20, William Qiu wrote: > Add documentation to describe OpenCores Pulse Width Modulation > controller driver. > > Signed-off-by: William Qiu <william.qiu@xxxxxxxxxxxxxxxx> > Reviewed-by: Hal Feng <hal.feng@xxxxxxxxxxxxxxxx> > --- > .../bindings/pwm/opencores,pwm.yaml | 56 +++++++++++++++++++ > 1 file changed, 56 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pwm/opencores,pwm.yaml > > diff --git a/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml b/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml > new file mode 100644 > index 000000000000..8f776bbc1112 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml > @@ -0,0 +1,56 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pwm/opencores,pwm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: OpenCores PWM controller > + > +maintainers: > + - William Qiu <william.qiu@xxxxxxxxxxxxxxxx> > + > +description: > + OpenCores PTC ip core contains a PWM controller. When operating in PWM mode, the PTC core > + generates binary signal with user-programmable low and high periods. All PTC counters and > + registers are 32-bit. Wrap at 80 (as Coding Style asks) > + > +allOf: > + - $ref: pwm.yaml# > + > +properties: > + compatible: > + oneOf: > + - items: > + - enum: > + - starfive,jh7100-pwm > + - starfive,jh7110-pwm > + - const: opencores,pwm That's a very, very generic compatible. Are you sure, 100% sure, that all designs from OpenCores from now till next 100 years will be 100% compatible? Best regards, Krzysztof
