On Tue, Nov 07, 2023 at 12:09:58PM +0100, Michal Simek wrote: > > > On 11/6/23 18:07, Conor Dooley wrote: > > On Mon, Nov 06, 2023 at 12:53:40PM +0100, Michal Simek wrote: > > > MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP. > > > It is hardware compatible with classic MicroBlaze processor. Processor can > > > be used with standard AMD/Xilinx IPs including interrupt controller and > > > timer. > > > > > > Signed-off-by: Michal Simek <michal.simek@xxxxxxx> > > > --- > > > > > > .../devicetree/bindings/soc/amd/amd.yaml | 26 +++++++++++++++++++ > > > > Bindings for SoCs (and by extension boards with them) usually go to in > > $arch/$vendor.yaml not into soc/$vendor/$vendor.yaml. Why is this any > > different? > > I actually found it based on tracking renesas.yaml which describes one of > risc-v board. No problem to move it under bindings/riscv/ That one is kinda a special case, as it contains arm/arm64/riscv.
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