On Sun, Nov 05, 2023 at 01:52:22PM +0100, Krzysztof Kozlowski wrote: > On 03/11/2023 18:36, William McVicker wrote: > > >> > >> That's indeed a problem. Future Tesla SoC might have just few pieces > >> similar to FSD. There would be no common SoC part, except the actual > >> Tesla IP. > >> > >> Same for Google. Future GSXXX, if done by Qualcomm, will be absolutely > >> different than GS101 and the only common part would be the TPU (Tensor). > >> > >> So now let's decide what is the common denominator: > >> 1. Core SoC architecture, like buses, pinctrl, clocks, timers, serial, > >> and many IP blocks, which constitute 95% of Devicetree bindings and drivers, > >> 2. The one, big piece made by Samsung's customer: TPU, NPU or whatever. > > > > As mentioned above, I think this should be based on how the DTBs and DTBOs are > > used and distributed. > > None of existing platforms do it. Nowhere. All chromebooks are split per > SoC, not "how DTBs should be used and distributed". There is no google, > no Chromebook directory. None of Samsung phones have it. No > Samsung-phone directory. None of Google phones have Pixel directory. but for code we have: drivers/patform/chrome/ drivers/firmware/google/ drivers/net/ethernet/google/ don't know if that matters or not, but thought I would mention it... thanks, greg k-h
