On 02/11/2023 20:31, Hugo Villeneuve wrote: > From: Hugo Villeneuve <hvilleneuve@xxxxxxxxxxxx> > > Add DT compatible string for RVE gateway board based on a Variscite > VAR-SOM-NANO with a NXP MX8MN nano CPU. > > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> > Signed-off-by: Hugo Villeneuve <hvilleneuve@xxxxxxxxxxxx> > --- > Documentation/devicetree/bindings/arm/fsl.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml > index 32b195852a75..4cef18e46312 100644 > --- a/Documentation/devicetree/bindings/arm/fsl.yaml > +++ b/Documentation/devicetree/bindings/arm/fsl.yaml > @@ -1018,6 +1018,7 @@ properties: > - fsl,imx8mn-ddr4-evk # i.MX8MN DDR4 EVK Board > - fsl,imx8mn-evk # i.MX8MN LPDDR4 EVK Board > - gw,imx8mn-gw7902 # i.MX8MM Gateworks Board > + - rve,rve-gateway # i.MX8MN RVE Gateway Board Eh, now it does not match your DTS. It does not look like you tested the DTS against bindings. Please run `make dtbs_check W=1` (see Documentation/devicetree/bindings/writing-schema.rst or https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/ for instructions). Best regards, Krzysztof