On Tue, Oct 31, 2023 at 11:52 PM Rob Herring <robh@xxxxxxxxxx> wrote:
>
> On Tue, Oct 31, 2023 at 10:36:37AM +0800, Binbin Zhou wrote:
> > As we know, the Loongson-2K0500 is a single-core CPU, and the
> > core1-related register (isr1) does not exist, and we need a separate
> > declaration.
> >
> > This fixes dtbs_check warning:
> >
> > DTC_CHK arch/loongarch/boot/dts/loongson-2k0500-ref.dtb
> > arch/loongarch/boot/dts/loongson-2k0500-ref.dtb: interrupt-controller@1fe11400: reg-names: ['main', 'isr0'] is too short
> > From schema: Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
> > arch/loongarch/boot/dts/loongson-2k0500-ref.dtb: interrupt-controller@1fe11400: Unevaluated properties are not allowed ('reg-names' was unexpected)
> > From schema: Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
> > arch/loongarch/boot/dts/loongson-2k0500-ref.dtb: interrupt-controller@1fe11400: reg: [[0, 534844416, 0, 64], [0, 534843456, 0, 8]] is too short
> > From schema: Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
> > arch/loongarch/boot/dts/loongson-2k0500-ref.dtb: interrupt-controller@1fe11440: reg-names: ['main', 'isr0'] is too short
> > From schema: Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
> >
> > Signed-off-by: Binbin Zhou <zhoubinbin@xxxxxxxxxxx>
> > ---
> > .../loongson,liointc.yaml | 22 ++++++++++++++-----
> > 1 file changed, 16 insertions(+), 6 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
> > index 0d9511b8a792..7393d7dfbe82 100644
> > --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
> > +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
> > @@ -11,8 +11,13 @@ maintainers:
> >
> > description: |
> > This interrupt controller is found in the Loongson-3 family of chips and
> > - Loongson-2K1000 chip, as the primary package interrupt controller which
> > + Loongson-2K series chips, as the primary package interrupt controller which
> > can route local I/O interrupt to interrupt lines of cores.
> > + Be aware of the following points.
> > + 1.The Loongson-2K0500 is a single core CPU, the isr1 register could not be defined;
> > + 2.The Loongson-2K0500/2K1000 has 64 device interrupt sources as inputs, so we
> > + need to define two nodes in dts{i} to describe the "0-31" and "32-61" interrupt
> > + sources respectively.
> >
> > allOf:
> > - $ref: /schemas/interrupt-controller.yaml#
> > @@ -29,10 +34,14 @@ properties:
> > maxItems: 3
> >
> > reg-names:
> > - items:
> > - - const: main
> > - - const: isr0
> > - - const: isr1
> > + oneOf:
> > + - items:
> > + - const: main
> > + - const: isr0
> > + - items:
> > + - const: main
> > + - const: isr0
> > + - const: isr1
>
> Just adding 'minItems: 2' accomplishes the same thing without
> duplicating the list.
OK, I will do it.
Thanks.
Binbin
>
> >
> > interrupt-controller: true
> >
> > @@ -94,7 +103,8 @@ if:
> > then:
> > properties:
> > reg:
> > - minItems: 3
> > + minItems: 2
> > + maxItems: 3
> >
> > required:
> > - reg-names
> > --
> > 2.39.3
> >
