This series adds support for the StarFive JH7100 SoC to the SiFive cache controller driver. The JH7100 was a "development version" of the JH7110 used on the BeagleV Starlight and VisionFive V1 boards. It has non-coherent peripheral DMAs but was designed before the standard RISC-V Zicbom extension, so it neeeds support in this driver for non-standard cache management. Emil Renner Berthing (4): dt-bindings: cache: sifive,ccache0: Add StarFive JH7100 compatible soc: sifive: ccache: Add StarFive JH7100 support dt-bindings: cache: sifive,ccache0: Add sifive,cache-ops property soc: sifive: ccache: Support cache management operations .../bindings/cache/sifive,ccache0.yaml | 11 +++- drivers/soc/sifive/sifive_ccache.c | 56 ++++++++++++++++++- 2 files changed, 64 insertions(+), 3 deletions(-) -- 2.40.1
