On Thu, Oct 19, 2023 at 03:56:45PM +0300, Eliza Balas wrote: > Add device tree documentation for the AXI TDD Core. > The generic TDD controller is in essence a waveform generator > capable of addressing RF applications which require Time Division > Duplexing, as well as controlling other modules of general > applications through its dedicated 32 channel outputs. > > Signed-off-by: Eliza Balas <eliza.balas@xxxxxxxxxx> > --- > .../devicetree/bindings/misc/adi,axi-tdd.yaml | 65 +++++++++++++++++++ > MAINTAINERS | 7 ++ > 2 files changed, 72 insertions(+) > create mode 100644 Documentation/devicetree/bindings/misc/adi,axi-tdd.yaml > > diff --git a/Documentation/devicetree/bindings/misc/adi,axi-tdd.yaml b/Documentation/devicetree/bindings/misc/adi,axi-tdd.yaml > new file mode 100644 > index 000000000000..4449d9abf46e > --- /dev/null > +++ b/Documentation/devicetree/bindings/misc/adi,axi-tdd.yaml > @@ -0,0 +1,65 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright 2023 Analog Devices Inc. > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/misc/adi,axi-tdd.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Analog Devices AXI TDD Core > + > +maintainers: > + - Eliza Balas <eliza.balas@xxxxxxxxxx> > + > +description: | > + The TDD controller is a waveform generator capable of addressing RF > + applications which require Time Division Duplexing, as well as controlling > + other modules of general applications through its dedicated 32 channel > + outputs. It solves the synchronization issue when transmitting and receiving > + multiple frames of data through multiple buffers. > + The TDD IP core is part of the Analog Devices hdl reference designs and has > + the following features: > + * Up to 32 independent output channels > + * Start/stop time values per channel > + * Enable and polarity bit values per channel > + * 32 bit-max internal reference counter > + * Initial startup delay before waveform generation > + * Configurable frame length and number of frames per burst > + * 3 sources of synchronization: external, internal and software generated > + For more information see the wiki: > + https://wiki.analog.com/resources/fpga/docs/axi_tdd > + > +properties: > + compatible: > + enum: > + - adi,axi-tdd I don't understand where the version number went. Now my question is is there only one version of this (ever). It's not specific enough unless there's a version register that can be relied on. This patch needs to answer any questions raised in previous versions. Assume the reviewers don't remember your patch and will ask the same questions again otherwise. Rob
