On Mon, Oct 23, 2023 at 10:57:51PM +0530, Anup Patel wrote: > The RISC-V advanced interrupt architecture (AIA) extends the per-HART > local interrupts in following ways: > 1. Minimum 64 local interrupts for both RV32 and RV64 > 2. Ability to process multiple pending local interrupts in same > interrupt handler > 3. Priority configuration for each local interrupts > 4. Special CSRs to configure/access the per-HART MSI controller > > We add support for #1 and #2 described above in the RISC-V intc driver. > > Signed-off-by: Anup Patel <apatel@xxxxxxxxxxxxxxxx> > --- > drivers/irqchip/irq-riscv-intc.c | 34 ++++++++++++++++++++++++++------ > 1 file changed, 28 insertions(+), 6 deletions(-) > Reviewed-by: Andrew Jones <ajones@xxxxxxxxxxxxxxxx>
