Anup Patel <apatel@xxxxxxxxxxxxxxxx> writes: > The riscv_of_processor_hartid() used by riscv_of_parent_hartid() fails > for HARTs disabled in the DT. This results in the following warning > thrown by the RISC-V INTC driver for the E-core on SiFive boards: > > [ 0.000000] riscv-intc: unable to find hart id for /cpus/cpu@0/interrupt-controller > > The riscv_of_parent_hartid() is only expected to read the hartid from > the DT so we should directly call of_get_cpu_hwid() instead of calling > riscv_of_processor_hartid(). > > Fixes: ad635e723e17 ("riscv: cpu: Add 64bit hartid support on RV64") Patch 1 and 3: These fixes are stand alone, and doesn't have to be part of the series. Wouldn't it be better to pull these out of the long-going series, and try to get in the fixes ASAP? Björn