The adcxx4s communicates with a host processor via an SPI/Microwire Bus interface. The device family responds with 12-bit data, of which the LSB bits are 0 for the lower resolution devices. The unavailable bits are 0 in LSB. Shift is calculated per resolution and used in scaling and raw data read. I have been able to test adc102s051, hence adding just the missing ones in that family. Lets reuse the binding to support the family of devices with name ADC<bb><c>S<sss>, where * bb is the resolution in number of bits (8, 10, 12) * c is the number of channels (1, 2, 4, 8) * sss is the maximum conversion speed (021 for 200 kSPS, 051 for 500 kSPS and 101 for 1 MSPS) Complete datasheets are available at TI's website here: https://www.ti.com/lit/gpn/adc<bb><c>s<sss>.pdf Co-developed-by: Nishanth Menon <nm@xxxxxx> Signed-off-by: Nishanth Menon <nm@xxxxxx> Signed-off-by: Sukrut Bellary <sukrut.bellary@xxxxxxxxx> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> --- Changes in v2: - No changes in dt-bindings - Link to v1: https://lore.kernel.org/all/20220701042919.18180-2-nm@xxxxxx/ --- .../devicetree/bindings/iio/adc/ti,adc128s052.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml index 775eee972b12..392b4a3e867c 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml @@ -16,6 +16,12 @@ description: | properties: compatible: enum: + - ti,adc082s021 + - ti,adc082s051 + - ti,adc082s101 + - ti,adc102s021 + - ti,adc102s051 + - ti,adc102s101 - ti,adc122s021 - ti,adc122s051 - ti,adc122s101 -- 2.34.1
