From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> Hey all, This patchset adds support for the "Auto Update" feature on PolarFire SoC that allows for writing an FPGA bistream to the SPI flash connected to the system controller. On powercycle (or reboot depending on how the firmware implements the openSBI SRST extension) "Auto Update" will take place, and program the FPGA with the contents of the SPI flash - provided that that image is valid and an actual upgrade from that already programmed. Previously this driver was added to the FPGA subsystem, but as there is no capability for dynamic reconfiguration due to the device reset requirement, the FPGA manager framework is not actually used by the driver. As a result, the FPGA maintainers did not think it belonged in that directory, and after speaking to Arnd, I have put it in drivers/firmware/microchip instead. Otherwise, very little has changed here, compared to the previous submission. If this is acceptable, I can add this to my eventual SoC drivers pull request for v6.8. Cheers, Conor. Changes in v3: - Move the driver to drivers/firmware - Rename the firmware upload device: s/mpfs_bitstream/mpfs-auto-update/ - Fix the clock parentage for the qspi node added in this series - https://lore.kernel.org/linux-fpga/ZDlJxrybiWy3Mk4Y@yilunxu-OptiPlex-7050/ Changes in v2: - per Russ' suggestion, the driver has been switched to using the firmware-upload API rather than the fpga one - as a result of that change, the structure of the driver has changed significantly, although most of that is reshuffling existing code around - check if the upgrade is possible in probe and fail if it isn't - only write the image index if it is not already set - delete the now unneeded debugfs bits CC: Arnd Bergmann <arnd@xxxxxxxx> CC: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> CC: Daire McNamara <daire.mcnamara@xxxxxxxxxxxxx> CC: Rob Herring <robh+dt@xxxxxxxxxx> CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx> CC: Moritz Fischer <mdf@xxxxxxxxxx> CC: Wu Hao <hao.wu@xxxxxxxxx> CC: Xu Yilun <yilun.xu@xxxxxxxxx> CC: Tom Rix <trix@xxxxxxxxxx> CC: Russ Weight <russell.h.weight@xxxxxxxxx> CC: linux-riscv@xxxxxxxxxxxxxxxxxxx CC: devicetree@xxxxxxxxxxxxxxx CC: linux-kernel@xxxxxxxxxxxxxxx CC: linux-fpga@xxxxxxxxxxxxxxx CC: soc@xxxxxxxxxx Conor Dooley (6): dt-bindings: soc: microchip: add a property for system controller flash soc: microchip: mpfs: enable access to the system controller's flash soc: microchip: mpfs: print service status in warning message soc: microchip: mpfs: add auto-update subdev to system controller firmware: microchip: add PolarFire SoC Auto Update support riscv: dts: microchip: add the mpfs' system controller qspi & associated flash .../microchip,mpfs-sys-controller.yaml | 10 + .../boot/dts/microchip/mpfs-icicle-kit.dts | 21 + arch/riscv/boot/dts/microchip/mpfs.dtsi | 17 + drivers/firmware/Kconfig | 1 + drivers/firmware/Makefile | 1 + drivers/firmware/microchip/Kconfig | 12 + drivers/firmware/microchip/Makefile | 3 + drivers/firmware/microchip/mpfs-auto-update.c | 494 ++++++++++++++++++ drivers/soc/microchip/Kconfig | 1 + drivers/soc/microchip/mpfs-sys-controller.c | 33 +- include/soc/microchip/mpfs.h | 2 + 11 files changed, 592 insertions(+), 3 deletions(-) create mode 100644 drivers/firmware/microchip/Kconfig create mode 100644 drivers/firmware/microchip/Makefile create mode 100644 drivers/firmware/microchip/mpfs-auto-update.c -- 2.39.2
