Hi Geert,
On Fri, Oct 20, 2023 at 09:26:31AM +0200, Geert Uytterhoeven wrote:
> Hi Yu,
>
> On Thu, Oct 19, 2023 at 4:01 PM Yu Chien Peter Lin
> <peterlin@xxxxxxxxxxxxx> wrote:
> > The Andes INTC allows AX45MP cores to handle custom local
> > interrupts, such as the performance monitor overflow interrupt.
> >
> > Signed-off-by: Yu Chien Peter Lin <peterlin@xxxxxxxxxxxxx>
> > ---
> > Changes v1 -> v2:
> > - New patch
>
> Thanks for your patch!
>
> > --- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
> > +++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
> > @@ -37,7 +37,7 @@ cpu0: cpu@0 {
> >
> > cpu0_intc: interrupt-controller {
> > #interrupt-cells = <1>;
> > - compatible = "riscv,cpu-intc";
> > + compatible = "andestech,cpu-intc";
>
> This compatible value is not documented. Perhaps it was introduced
> in an earlier patch in the series, to which I was not CCed?
>
> Threading is broken, so I can't easily find the whole series in lore:
> https://lore.kernel.org/all/20231019135810.3657665-1-peterlin@xxxxxxxxxxxxx/
Sorry, I'll send PATCH v3 with some fixes.
Thanks for reminding me of this.
Best regards,
Peter Lin
> > interrupt-controller;
> > };
> > };
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
