> -----Original Message-----
> From: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
> Sent: Wednesday, October 18, 2023 3:17 PM
> To: linux-rockchip@xxxxxxxxxxxxxxxxxxx
> Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> linux-pm@xxxxxxxxxxxxxxx; Heiko Stuebner <heiko@xxxxxxxxx>; Chanwoo Choi
> <chanwoo@xxxxxxxxxx>; Kyungmin Park <kyungmin.park@xxxxxxxxxxx>; MyungJoo
> Ham <myungjoo.ham@xxxxxxxxxxx>; Will Deacon <will@xxxxxxxxxx>; Mark
> Rutland <mark.rutland@xxxxxxx>; kernel@xxxxxxxxxxxxxx; Michael Riesch
> <michael.riesch@xxxxxxxxxxxxxx>; Robin Murphy <robin.murphy@xxxxxxx>;
> Vincent Legoll <vincent.legoll@xxxxxxxxx>; Rob Herring
> <robh+dt@xxxxxxxxxx>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@xxxxxxxxxx>; Conor Dooley <conor+dt@xxxxxxxxxx>;
> devicetree@xxxxxxxxxxxxxxx; Sebastian Reichel
> <sebastian.reichel@xxxxxxxxxxxxx>; Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>;
> Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>; Chanwoo Choi
> <cw00.choi@xxxxxxxxxxx>
> Subject: [PATCH v8 11/26] PM / devfreq: rockchip-dfi: Handle LPDDR2
> correctly
>
> According to the downstream driver the DDRMON_CTRL_LPDDR23 bit must be set
> for both LPDDR2 and LPDDR3. Add the missing LPDDR2 case and while at it
> turn the if/else if/else into switch/case which makes it easier to read.
>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>
> Reviewed-by: Sebastian Reichel <sebastian.reichel@xxxxxxxxxxxxx>
> Acked-by: Chanwoo Choi <cw00.choi@xxxxxxxxxxx>
> Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
> ---
> drivers/devfreq/event/rockchip-dfi.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/devfreq/event/rockchip-dfi.c
> b/drivers/devfreq/event/rockchip-dfi.c
> index 571d72d1abd1c..8ce0191552ef1 100644
> --- a/drivers/devfreq/event/rockchip-dfi.c
> +++ b/drivers/devfreq/event/rockchip-dfi.c
> @@ -83,12 +83,19 @@ static void rockchip_dfi_start_hardware_counter(struct
> devfreq_event_dev *edev)
> DDRMON_CTRL_HARDWARE_EN), dfi_regs + DDRMON_CTRL);
>
> /* set ddr type to dfi */
> - if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR3)
> + switch (dfi->ddr_type) {
> + case ROCKCHIP_DDRTYPE_LPDDR2:
> + case ROCKCHIP_DDRTYPE_LPDDR3:
> writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR23,
> DDRMON_CTRL_DDR_TYPE_MASK),
> dfi_regs + DDRMON_CTRL);
> - else if (dfi->ddr_type == ROCKCHIP_DDRTYPE_LPDDR4)
> + break;
> + case ROCKCHIP_DDRTYPE_LPDDR4:
> writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_LPDDR4,
> DDRMON_CTRL_DDR_TYPE_MASK),
> dfi_regs + DDRMON_CTRL);
> + break;
> + default:
> + break;
> + }
>
> /* enable count, use software mode */
> writel_relaxed(HIWORD_UPDATE(DDRMON_CTRL_SOFTWARE_EN,
> DDRMON_CTRL_SOFTWARE_EN),
> --
> 2.39.2
Applied it. Thanks
Best Regards,
Chanwoo Choi
