Hi Yu-Chien,
On Mon, Oct 16, 2023 at 8:10 AM Yu-Chien Peter Lin
<peterlin@xxxxxxxxxxxxx> wrote:
> On Mon, Oct 09, 2023 at 10:37:48AM +0100, Conor Dooley wrote:
> > Convert the RZ/Five devicetrees to use the new properties
> > "riscv,isa-base" & "riscv,isa-extensions".
> > For compatibility with other projects, "riscv,isa" remains.
> >
> > Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> > ---
> > arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 3 +++
> > 1 file changed, 3 insertions(+)
> >
> > diff --git a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
> > index b0796015e36b..eb301d8eb2b0 100644
> > --- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
> > +++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
> > @@ -24,6 +24,9 @@ cpu0: cpu@0 {
> > reg = <0x0>;
> > status = "okay";
> > riscv,isa = "rv64imafdc";
> > + riscv,isa-base = "rv64i";
> > + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
> > + "zifencei", "zihpm";
>
> We do have zihpm, and OpenSBI can also probe its existence.
>
> Boot HART ISA Extensions : zihpm
> Boot HART MHPM Info : 4 (0x00000078)
Thank you, I hadn't digested the full output from OpenSBI yet, and
I can confirm this is present in that output.
Acked-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
