On 10/13/23 12:32, Krzysztof Kozlowski wrote:
On 13/10/2023 12:14, Praveen Teja Kundanala wrote:Add nvmem DT nodes for ZynqMP SOC Signed-off-by: Praveen Teja Kundanala <praveen.teja.kundanala@xxxxxxx> --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 55 ++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 02cfcc716936..b8807dcce442 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -190,6 +190,61 @@ nvmem_firmware { soc_revision: soc_revision@0 { reg = <0x0 0x4>; }; + /* efuse access */ + efuse_dna: efuse_dna@c {No underscores in node names. I see now from where did you get the initial pattern. Would be great if you fixed Xilinx DTS :/
I actually fixed soc-revision here. https://lore.kernel.org/all/5137958580c85a35cf6aadd1c33a2f6bcf81a9e5.1695040866.git.michal.simek@xxxxxxx/ Thanks, Michal
