Hey Anup, On Fri, Oct 13, 2023 at 12:16:45PM +0530, Anup Patel wrote: > On Thu, Oct 12, 2023 at 10:05 PM Conor Dooley <conor@xxxxxxxxxx> wrote: > > On Tue, Oct 03, 2023 at 10:13:55AM +0530, Anup Patel wrote: > > > We add DT bindings document for the RISC-V incoming MSI controller > > > (IMSIC) defined by the RISC-V advanced interrupt architecture (AIA) > > > specification. > > > > > > Signed-off-by: Anup Patel <apatel@xxxxxxxxxxxxxxxx> > > > Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > > > > Just FYI, since they'll reply to this themselves, but some of the > > Microchip folks have run into problems with sparse hart indexes while > > trying to use the imsic binding to describe some configurations they > > have. I think there were also so problems with how to describe to a > > linux guest which file to use, when the first hart available to the > > guest does not use the first file. They'll do a better job of describing > > their problems than I will, so I shall leave it to them! > > Quoting AIA spec: > "For the purpose of locating the memory pages of interrupt files in the > address space, assume each hart (or each hart within a group) has a > unique hart number that may or may not be related to the unique hart > identifiers (“hart IDs”) that the RISC-V Privileged Architecture assigns > to harts." > > It is very easy to get confused between the AIA "hart index" and > "hart IDs" defined by the RISC-V Privileged specification but these > are two very different things. The AIA "hart index" over here is the > bits in the address of an IMSIC file. > > This DT binding follows the IMSIC file arrangement in the address > space as defined by the section "3.6 Arrangement of the memory > regions of multiple interrupt files" of the AIA specification. This > arrangement is MANDATORY for platforms having both APLIC > and IMSIC because in MSI-mode the APLIC generates target > MSI address based the IMSIC file arrangement described in the > section "3.6 Arrangement of the memory regions of multiple > interrupt files". In fact, this also applies to virtual platforms > created by hypervisors (KVM, Xen, ...) Thanks for pointing this out - I'll pass it on and hopefully it is helpful to them. If not, I expect that you'll hear :) Cheers, Conor.
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