On Wed, Oct 04, 2023 at 11:44:06PM +0800, Chen Wang wrote: > From: Chen Wang <unicorn_wang@xxxxxxxxxxx> > > Milk-V Pioneer motherboard is powered by SG2042. > > SG2042 is server grade chip with high performance, low power > consumption and high data throughput. > Key features: > - 64 RISC-V cpu cores > - 4 cores per cluster, 16 clusters on chip > - More info is available at [1]. > > Currently only support booting into console with only uart, > other features will be added soon later. > > Reviewed-by: Guo Ren <guoren@xxxxxxxxxx> > Acked-by: Chao Wei <chao.wei@xxxxxxxxxx> > Co-developed-by: Xiaoguang Xing <xiaoguang.xing@xxxxxxxxxx> > Signed-off-by: Xiaoguang Xing <xiaoguang.xing@xxxxxxxxxx> > Co-developed-by: Inochi Amaoto <inochiama@xxxxxxxxxxx> > Signed-off-by: Inochi Amaoto <inochiama@xxxxxxxxxxx> > Signed-off-by: Chen Wang <unicorn_wang@xxxxxxxxxxx> > > Link: https://en.sophgo.com/product/introduce/sg2042.html [1] > --- > MAINTAINERS | 1 + > arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi | 2000 +++++++++++++++++++ > arch/riscv/boot/dts/sophgo/sg2042.dtsi | 325 +++ > 3 files changed, 2326 insertions(+) > create mode 100644 arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi > create mode 100644 arch/riscv/boot/dts/sophgo/sg2042.dtsi > > diff --git a/MAINTAINERS b/MAINTAINERS > index 97cb8abcfeee..fedf042e5fb4 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -20067,6 +20067,7 @@ SOPHGO DEVICETREES > M: Chao Wei <chao.wei@xxxxxxxxxx> > M: Chen Wang <unicorn_wang@xxxxxxxxxxx> > S: Maintained > +F: arch/riscv/boot/dts/sophgo/ > F: Documentation/devicetree/bindings/riscv/sophgo.yaml > > SOUND > diff --git a/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi b/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi > new file mode 100644 > index 000000000000..b136b6c4128c > --- /dev/null > +++ b/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi > @@ -0,0 +1,2000 @@ > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > +/* > + * Copyright (C) 2022 Sophgo Technology Inc. All rights reserved. > + */ ... > + intc: interrupt-controller@7090000000 { > + compatible = "sophgo,sg2042-plic", "thead,c900-plic"; > + #address-cells = <0>; > + #interrupt-cells = <2>; > + reg = <0x00000070 0x90000000 0x00000000 0x04000000>; > + interrupt-controller; > + interrupts-extended = > + <&cpu0_intc 0xffffffff>, <&cpu0_intc 9>, -1 may not be correct, is machine external interrupt(id: 11) supported? Thanks
