Hi, On Thu, Oct 05, 2023 at 04:54:20PM +0200, Benjamin Gaignard wrote: > Add node for AV1 video decoder. > > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@xxxxxxxxxxxxx> > Signed-off-by: Sebastian Reichel <sebastian.reichel@xxxxxxxxxxxxx> No need for my SoB. Instead have this one: Reviewed-by: Sebastian Reichel <sebastian.reichel@xxxxxxxxxxxxx> Also worth mentioning, that this Patch needs one small fix in the DT binding (adding "resets") and one small fix in the driver for out of the box AV1 support: https://lore.kernel.org/all/20231005144934.169356-1-benjamin.gaignard@xxxxxxxxxxxxx/ https://lore.kernel.org/all/20231005145116.169411-1-benjamin.gaignard@xxxxxxxxxxxxx/ Greetings, -- Sebastian > --- > arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > index 5544f66c6ff4..835e66d85d5f 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > @@ -2304,6 +2304,20 @@ gpio4: gpio@fec50000 { > #interrupt-cells = <2>; > }; > }; > + > + av1d: av1d@fdc70000 { > + compatible = "rockchip,rk3588-av1-vpu"; > + reg = <0x0 0xfdc70000 0x0 0x800>; > + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>; > + interrupt-names = "vdpu"; > + clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; > + clock-names = "aclk", "hclk"; > + assigned-clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; > + assigned-clock-rates = <400000000>, <400000000>; > + resets = <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, <&cru SRST_P_AV1_BIU>; > + power-domains = <&power RK3588_PD_AV1>; > + status = "okay"; > + }; > }; > > #include "rk3588s-pinctrl.dtsi" > -- > 2.39.2 >
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