Hello, The EyeQ5 SoC from Mobileye is based on the MIPS I6500 architecture and features multiple controllers such as the classic UART, I2C, SPI, as well as CAN-FD, PCIe, Octal/Quad SPI Flash interface, Gigabit Ethernet, MIPI CSI-2, and eMMC 5.1. It also includes a Hardware Security Module, Functional Safety Hardware, and MJPEG encoder. One peculiarity of this SoC is that the physical address of the DDDR exceeds 32 bits. Given that the architecture is 64 bits, this is not an issue, but it requires some changes in how the mips64 is currently managed during boot. With the second patch, we enable the use of xphys instead of the legacy kesg0 and kseg1. However, the vector reset remains 32 bits. So the third patch allows the use of aliasing to map the vector address using a 32-bit pointer. While working on it, we found that there was an issue in the way the assembly code managed kernel uncompression. While most of the head.S file uses macros to employ the correct instruction depending on whether it's in 32 or 64 bits, one was missing. Fixing it is the purpose of the first patch. Then the following 4 patches document the bindings that will be used for the device tree of the SoC submitted by patch 7. In addition to the SoC support, patch 8 adds support for the evaluation board. Finally, patch 10 adds support to build the kernel image for the EyeQ5 SoC and board, not only the Kconfig and Makefile infrastructure but also an ITS file and a default configuration. To build and test the kernel, we need to run the following commands: make 64r6el_defconfig BOARDS=eyeq5 make vmlinuz.itb And then from U-Boot bootm ${vmlinuz.itb_addr}#conf-1 Gregory Gregory CLEMENT (9): MIPS: compressed: Use correct instruction for 64 bit code dt-bindings: Add vendor prefix for Mobileye Vision Technologies Ltd. dt-bindings: mips: cpu: Add I-Class I6500 Multiprocessor Core dt-bindings: mips: Add bindings for Mobileye SoCs dt-bindings: mfd: syscon: Document EyeQ5 OLB MIPS: mobileye: Add EyeQ5 dtsi MIPS: mobileye: Add EPM5 device tree MIPS: generic: Add support for Mobileye EyeQ5 MAINTAINERS: Add entry for Mobileye MIPS SoCs Vladimir Kondratiev (2): MIPS: use virtual addresses from xkphys for MIPS64 MIPS: support RAM beyond 32-bit .../devicetree/bindings/mfd/syscon.yaml | 1 + .../devicetree/bindings/mips/cpus.yaml | 1 + .../devicetree/bindings/mips/mobileye.yaml | 36 ++ .../devicetree/bindings/vendor-prefixes.yaml | 2 + MAINTAINERS | 12 + arch/mips/Kconfig | 15 + arch/mips/Makefile | 4 + arch/mips/boot/compressed/head.S | 4 +- arch/mips/boot/dts/Makefile | 1 + arch/mips/boot/dts/mobileye/Makefile | 6 + arch/mips/boot/dts/mobileye/eyeq5-epm5.dts | 24 ++ .../boot/dts/mobileye/eyeq5-fixed-clocks.dtsi | 315 ++++++++++++++++++ arch/mips/boot/dts/mobileye/eyeq5.dtsi | 138 ++++++++ arch/mips/configs/generic/board-eyeq5.config | 42 +++ arch/mips/generic/Kconfig | 14 + arch/mips/generic/Platform | 7 + arch/mips/generic/board-epm5.its.S | 24 ++ arch/mips/include/asm/addrspace.h | 12 +- arch/mips/include/asm/mips-cm.h | 1 + arch/mips/include/asm/page.h | 10 + arch/mips/include/asm/vga.h | 4 + arch/mips/kernel/cps-vec.S | 8 + arch/mips/kernel/genex.S | 14 + arch/mips/kernel/smp-cps.c | 47 ++- arch/mips/kernel/traps.c | 32 +- arch/mips/lib/uncached.c | 10 + arch/mips/mm/init.c | 4 +- include/dt-bindings/soc/mobileye,eyeq5.h | 77 +++++ 28 files changed, 847 insertions(+), 18 deletions(-) create mode 100644 Documentation/devicetree/bindings/mips/mobileye.yaml create mode 100644 arch/mips/boot/dts/mobileye/Makefile create mode 100644 arch/mips/boot/dts/mobileye/eyeq5-epm5.dts create mode 100644 arch/mips/boot/dts/mobileye/eyeq5-fixed-clocks.dtsi create mode 100644 arch/mips/boot/dts/mobileye/eyeq5.dtsi create mode 100644 arch/mips/configs/generic/board-eyeq5.config create mode 100644 arch/mips/generic/board-epm5.its.S create mode 100644 include/dt-bindings/soc/mobileye,eyeq5.h -- 2.40.1