From: Alvin Šipraga <alsi@xxxxxxxxxxxxxxx> This series intends to address a problem I had when using the Si5351A as a runtime adjustable audio bit clock. The basic issue is that the driver in its current form unconditionally resets the PLL whenever adjusting its rate. But this reset causes an unwanted ~1.4 ms LOW signal glitch in the clock output. As a remedy, a new property is added to control the reset behaviour of the PLLs more precisely. In the process I also converted the bindings to YAML. Changes: v1 -> v2: - address Rob's comments on the two dt-bindings patches - new patch to correct the clock node names in the only upstream device tree using si5351 Alvin Šipraga (4): dt-bindings: clock: si5351: convert to yaml ARM: dts: dove-cubox: fix si5351 node names dt-bindings: clock: si5351: add PLL reset mode property clk: si5351: allow PLLs to be adjusted without reset .../bindings/clock/silabs,si5351.txt | 126 -------- .../bindings/clock/silabs,si5351.yaml | 277 ++++++++++++++++++ arch/arm/boot/dts/marvell/dove-cubox.dts | 4 +- drivers/clk/clk-si5351.c | 47 ++- include/linux/platform_data/si5351.h | 2 + 5 files changed, 325 insertions(+), 131 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/silabs,si5351.txt create mode 100644 Documentation/devicetree/bindings/clock/silabs,si5351.yaml -- 2.42.0
