Now that the circular dependency between syscon and clock initialization
has been resolved, we can add the clock that drives the pwrcfg syscon to
the device tree.
Signed-off-by: Ben Wolsieffer <ben.wolsieffer@xxxxxxxxxxx>
---
arch/arm/boot/dts/st/stm32f429.dtsi | 1 +
arch/arm/boot/dts/st/stm32f746.dtsi | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/st/stm32f429.dtsi b/arch/arm/boot/dts/st/stm32f429.dtsi
index 8efcda9ef8ae..7c9a9133cc86 100644
--- a/arch/arm/boot/dts/st/stm32f429.dtsi
+++ b/arch/arm/boot/dts/st/stm32f429.dtsi
@@ -665,6 +665,7 @@ spi6: spi@40015400 {
pwrcfg: power-config@40007000 {
compatible = "st,stm32-power-config", "syscon";
reg = <0x40007000 0x400>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(PWR)>;
};
ltdc: display-controller@40016800 {
diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm32f746.dtsi
index d1802efd067c..cc8177466a51 100644
--- a/arch/arm/boot/dts/st/stm32f746.dtsi
+++ b/arch/arm/boot/dts/st/stm32f746.dtsi
@@ -510,6 +510,7 @@ pwm {
pwrcfg: power-config@40007000 {
compatible = "st,stm32-power-config", "syscon";
reg = <0x40007000 0x400>;
+ clocks = <&rcc 0 STM32F7_APB1_CLOCK(PWR)>;
};
crc: crc@40023000 {
--
2.42.0
