From: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
Add initial support for the Renesas Ebisu-4D development board.
The Ebisu-4D board is very similar to the Ebisu board, but the memory
configuration is different.
- The memory map of Ebisu-4D board is as follows:
Bank0: 2 GiB RAM : 0x000048000000 -> 0x000bfffffff
- The memory map of Ebisu board is as follows:
Bank0: 1 GiB RAM : 0x000048000000 -> 0x0007fffffff
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
[wsa: rebased]
Signed-off-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
---
Resending this patch because I want to utilize all 2GB of memory on my
Ebisu. Since nobody updated U-Boot to handle different RAM sizes on
Ebisu in the last 4.5 years, let's add the Ebisu-4D as a seperate board.
arch/arm64/boot/dts/renesas/Makefile | 1 +
.../boot/dts/renesas/r8a77990-ebisu-4d.dts | 25 +++++++++++++++++++
2 files changed, 26 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/r8a77990-ebisu-4d.dts
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 7114cbbd8713..ad8f13f9907a 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -55,6 +55,7 @@ dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-v3hsk.dtb
dtb-$(CONFIG_ARCH_R8A77980) += r8a77980a-condor-i.dtb
dtb-$(CONFIG_ARCH_R8A77990) += r8a77990-ebisu.dtb
+dtb-$(CONFIG_ARCH_R8A77990) += r8a77990-ebisu-4d.dtb
dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu-4d.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu-4d.dts
new file mode 100644
index 000000000000..9f5bc7a7734f
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu-4d.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Ebisu-4D board
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r8a77990-ebisu.dts"
+
+/ {
+ model = "Renesas Ebisu-4D board based on r8a77990";
+ compatible = "renesas,ebisu", "renesas,r8a77990";
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x78000000>;
+ };
+};
+
+&pciec0 {
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+};
--
2.30.2
