On Fri Sep 29, 2023 at 1:44 PM CEST, Konrad Dybcio wrote: > On 29.09.2023 09:31, Luca Weiss wrote: > > Add the USB3+DP Combo QMP PHY port subnodes in the SC7280 SoC DTSI to > > avoid duplication in the devices DTs. > The rationale here is to make describing the connections between > certain hw blocks possible. Defining it in the soc dtsi gives us > a very cool side-effect of not having to repeat this, but it's not > the main point here Commit message is copy-pasted from sm8550 commit with has your R-b ;) But I'll change it for this commit since your comment makes sense. > > With the commit msg amended: > > Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> > > Konrad
