On Fri, 29 Sept 2023 at 10:33, Varadarajan Narayanan
<quic_varada@xxxxxxxxxxx> wrote:
>
> On Thu, Sep 07, 2023 at 10:31:55AM +0200, Konrad Dybcio wrote:
> > On 7.09.2023 07:21, Varadarajan Narayanan wrote:
> > > Stromer Plus PLL found on IPQ53xx doesn't support dynamic
> > > frequency scaling. To achieve the same, we need to park the APPS
> > > PLL source to GPLL0, re configure the PLL and then switch the
> > > source to APSS_PLL_EARLY.
> > >
> > > To support this, register a clock notifier to get the PRE_RATE
> > > and POST_RATE notification. Change the APSS PLL source to GPLL0
> > > when PRE_RATE notification is received, then configure the PLL
> > > and then change back the source to APSS_PLL_EARLY.
> > >
> > > Signed-off-by: Kathiravan T <quic_kathirav@xxxxxxxxxxx>
> > > Signed-off-by: Varadarajan Narayanan <quic_varada@xxxxxxxxxxx>
> > > ---
> > > drivers/clk/qcom/apss-ipq6018.c | 54 ++++++++++++++++++++++++++++++++++++++++-
> > > 1 file changed, 53 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/clk/qcom/apss-ipq6018.c b/drivers/clk/qcom/apss-ipq6018.c
> > > index 4e13a08..ffb6ab5 100644
> > > --- a/drivers/clk/qcom/apss-ipq6018.c
> > > +++ b/drivers/clk/qcom/apss-ipq6018.c
> > > @@ -9,8 +9,11 @@
> > > #include <linux/clk-provider.h>
> > > #include <linux/regmap.h>
> > > #include <linux/module.h>
> > > +#include <linux/clk.h>
> > > +#include <linux/soc/qcom/smem.h>
> > >
> > > #include <dt-bindings/clock/qcom,apss-ipq.h>
> > > +#include <dt-bindings/arm/qcom,ids.h>
> > >
> > > #include "common.h"
> > > #include "clk-regmap.h"
> > > @@ -84,15 +87,64 @@ static const struct qcom_cc_desc apss_ipq6018_desc = {
> > > .num_clks = ARRAY_SIZE(apss_ipq6018_clks),
> > > };
> > >
> > > +static int cpu_clk_notifier_fn(struct notifier_block *nb, unsigned long action,
> > > + void *data)
> > > +{
> > > + u8 index;
> > > + int err;
> > > +
> > > + if (action == PRE_RATE_CHANGE)
> > > + index = P_GPLL0;
> > > + else if (action == POST_RATE_CHANGE)
> > > + index = P_APSS_PLL_EARLY;
> > > + else
> > > + return 0;
> > > +
> > > + err = clk_rcg2_mux_closest_ops.set_parent(&apcs_alias0_clk_src.clkr.hw,
> > > + index);
> > Adding a variable for clk_hw within the apcs_alias0 clock would
> > make this easier to digest, I think.
> >
> > And if we wanna be even less error-prone, you can reference the
> > ops of this clock in an indirect way.
>
> Will change it as
>
> struct clk_hw *hw;
>
> hw = &apcs_alias0_clk_src.clkr.hw;
> err = hw->init->ops->set_parent(hw, index);
You can not do this, hw->init is cleared during registration.
>
> > > + return notifier_from_errno(err);
> > > +}
> > > +
> > > +static struct notifier_block cpu_clk_notifier = {
> > > + .notifier_call = cpu_clk_notifier_fn,
> > > +};
> > > +
> > > static int apss_ipq6018_probe(struct platform_device *pdev)
> > > {
> > > struct regmap *regmap;
> > > + u32 soc_id;
> > > + int ret;
> > > +
> > > + ret = qcom_smem_get_soc_id(&soc_id);
> > > + if (ret)
> > > + return ret;
> > >
> > > regmap = dev_get_regmap(pdev->dev.parent, NULL);
> > > if (!regmap)
> > > return -ENODEV;
> > >
> > > - return qcom_cc_really_probe(pdev, &apss_ipq6018_desc, regmap);
> > > + ret = qcom_cc_really_probe(pdev, &apss_ipq6018_desc, regmap);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + switch (soc_id) {
> > > + /*
> > > + * Only below variants of IPQ53xx support scaling
> > > + */
> > 1. /* Keep this in a 1-line comment */
>
> Ok
>
> > 2. why? explain the reasoning in the commit message
>
> Ok
>
> Thanks
> Varada
>
> > > + case QCOM_ID_IPQ5332:
> > > + case QCOM_ID_IPQ5322:
> > > + case QCOM_ID_IPQ5300:
> > > + ret = clk_notifier_register(apcs_alias0_clk_src.clkr.hw.clk,
> > > + &cpu_clk_notifier);
> > > + if (ret)
> > > + return ret;
> > > + break;
> > > + default:
> > > + break;
> > > + }
> > > +
> > > + return 0;
> > > }
> > >
> > > static struct platform_driver apss_ipq6018_driver = {
--
With best wishes
Dmitry
