The QMC (QUICC mutichannel controller) is a controller present in some
PowerQUICC SoC such as MPC885.
The QMC HDLC uses the QMC controller to transfer HDLC data.
Additionally, a framer can be connected to the QMC HDLC.
If present, this framer is the interface between the TDM bus used by the
QMC HDLC and the E1/T1 line.
The QMC HDLC can use this framer to get information about the E1/T1 line
and configure the E1/T1 line.
Signed-off-by: Herve Codina <herve.codina@xxxxxxxxxxx>
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
---
.../soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml | 30 +++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml
index 82d9beb48e00..e802e25923aa 100644
--- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml
+++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml
@@ -101,6 +101,32 @@ patternProperties:
Channel assigned Rx time-slots within the Rx time-slots routed by the
TSA to this cell.
+ compatible:
+ items:
+ - enum:
+ - fsl,mpc885-scc-qmc-hdlc
+ - fsl,mpc866-scc-qmc-hdlc
+ - const: fsl,cpm1-scc-qmc-hdlc
+ - const: fsl,qmc-hdlc
+
+ fsl,framer:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ phandle to the framer node. The framer is in charge of an E1/T1 line
+ interface connected to the TDM bus. It can be used to get the E1/T1 line
+ status such as link up/down.
+
+ allOf:
+ - if:
+ properties:
+ compatible:
+ not:
+ contains:
+ const: fsl,qmc-hdlc
+ then:
+ properties:
+ fsl,framer: false
+
required:
- reg
- fsl,tx-ts-mask
@@ -155,9 +181,13 @@ examples:
channel@19 {
/* Ch19 : 8 TS (TS 8..15) from all routed from TSA */
+ compatible = "fsl,mpc885-scc-qmc-hdlc",
+ "fsl,cpm1-scc-qmc-hdlc",
+ "fsl,qmc-hdlc";
reg = <19>;
fsl,operational-mode = "hdlc";
fsl,tx-ts-mask = <0x00000000 0x0000ff00>;
fsl,rx-ts-mask = <0x00000000 0x0000ff00>;
+ fsl,framer = <&framer>;
};
};
--
2.41.0
