[PATCH v10 0/5] Enable Display for J784S4 and AM69-SK platform

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This series adds support for:
- DisplayPort for J784S4-EVM
- Displayport and HDMI for AM69-SK platform

NOTE: Patch 4/5 introduces the following dtc warning which can be ignored
since its behind W=1 check:
Warning (graph_child_address): /bus@100000/dss@4a00000/ports: graph node
has single child node 'port@0', #address-cells/#size-cells are not
necessary

(This is more accurate description for port and the dtc check should not
differentiate between port@0 and port@1.[3])

Changelog v9->v10:
- Remove duplicate properties from dp0_ports node in main file.
- Add reg for the port even though there is only single port in dss_port
  since its more accurate description for the port.
- Carry the R-by tags from v9.

Changelog v8->v9:
- Fix compatible of serdes_ln_ctrl node
- Fix extra new lines across nodes
- Fix node-names to keep them generic

Changelog v7->v8:
- rebase on tag next-20230731
- add AM69 display support
- fix commit heading for patch [2/5]

Changelog v6->v7:
- change compatible for scm_conf to 'simple-bus'
- drop main_cpsw node due to driver dependency on [2]

Changelog v5->v6:
- Change header file according to [1].
- Add idle-state property in serdes_ln_ctrl node.
- Fix dtbs_check warning due to clock-frequency property in serdes_refclk
  node by disabling the node in main.dtsi and enabling it in board file
  when the clock-frequency node is actually added.

Changelog v4->v5:
- rebased the patches on linux-next tip.

Changelog v3->v4:
- add reg property to serdes_ln_ctrl and fix the node name again to
  get rid of dtbs_check error.
- reorder reg, reg-names and ranges property for main_cpsw1.
- correct the order for clocks in serdes_wiz nodes to fix dtbs_check
  warnings.
- fix indentation in reg, reg-names and clock property for dss node.
- add comments for the reg type in dss registers.

Changelog v3->v2:
- fix dtc warnings for 'scm_conf' and 'serdes_ln_ctrl' nodes
  (Checked all the changes of the series with W=12 option during build)
- added clock-frequency for serdes_refclk along with other EVM changes
  This refclk is being used by all the instances of serdes_wiz which
  are disabled by default. So configuring refclk when the serdes nodes
  are used for the first time is okay.

Changelog v1->v2:
- Moved J784S4 EVM changes together to the last patch
  (Suggested by Andrew)

v9 patch link:
<https://lore.kernel.org/all/20230803080441.367341-1-j-choudhary@xxxxxx/>

[1]: <https://lore.kernel.org/all/20230721125732.122421-1-j-choudhary@xxxxxx/>
[2]: <https://lore.kernel.org/all/20230605154153.24025-1-afd@xxxxxx/>
[3]: <https://lore.kernel.org/all/570903b6-8239-d44a-5fac-71700804cb5d@xxxxxx/>

Dasnavis Sabiya (1):
  arm64: dts: ti: k3-am69-sk: Add DP and HDMI support

Rahul T R (2):
  arm64: dts: ti: k3-j784s4-main: Add DSS and DP-bridge node
  arm64: dts: ti: k3-j784s4-evm: Enable DisplayPort-0

Siddharth Vadapalli (2):
  arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane
    mux
  arm64: dts: ti: k3-j784s4-main: Add WIZ and SERDES PHY nodes

 arch/arm64/boot/dts/ti/k3-am69-sk.dts      | 234 ++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-j784s4-evm.dts   | 124 ++++++++++
 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 265 +++++++++++++++++++++
 3 files changed, 623 insertions(+)

-- 
2.25.1





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