The GPIO block on the very legacy IXP4xx GPIO can provide a generated clock output on GPIO 14 and GPIO 15. This provides a straight-forward solution with a flag for each clock output. More complicated solutions are thinkable, but I deemed them overdesigned for this legacy SoC. Signed-off-by: Linus Walleij <linus.walleij@xxxxxxxxxx> --- Changes in v3: - Make sure to only manipulate the clock bits if one of the clock DT properties is set. Devices we can't test may rely on HW defaults being preserved in the clock bits. - Link to v2: https://lore.kernel.org/r/20230922-ixp4xx-gpio-clocks-v2-0-0215ee10976d@xxxxxxxxxx Changes in v2: - Fixed formatting pipe | in bindings - Fixed som blank lines in bindings - When we will just blank out the clock register settings, don't spend time reading the initial value. - Link to v1: https://lore.kernel.org/r/20230921-ixp4xx-gpio-clocks-v1-0-574942bf944a@xxxxxxxxxx --- Linus Walleij (2): gpio: Rewrite IXP4xx GPIO bindings in schema gpio: ixp4xx: Handle clock output on pin 14 and 15 .../devicetree/bindings/gpio/intel,ixp4xx-gpio.txt | 38 ----------- .../bindings/gpio/intel,ixp4xx-gpio.yaml | 73 ++++++++++++++++++++++ MAINTAINERS | 2 +- drivers/gpio/gpio-ixp4xx.c | 49 ++++++++++++++- 4 files changed, 122 insertions(+), 40 deletions(-) --- base-commit: 0bb80ecc33a8fb5a682236443c1e740d5c917d1d change-id: 20230921-ixp4xx-gpio-clocks-7e82289f4bb3 Best regards, -- Linus Walleij <linus.walleij@xxxxxxxxxx>
