Re: [RFC PATCH 1/8] drm/panel: nv3052c: Document known register names

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On 9/13/2023 9:12 PM, John Watts wrote:
On Wed, Sep 13, 2023 at 02:43:43PM -0700, Jessica Zhang wrote:
Hi John,

Just curious, what do you mean by these registers being mostly unknown?

I do see them specified in the online specs -- some even seem to map to
existing MIPI_DCS_* enums (ex. 0x01 to MIPI_DCS_SOFT_RESET, and 0x04 to
MIPI_DCS_GET_DISPLAY_ID).

Thanks,

Jessica Zhang

Hi Jessica,

Unfortunately these registers are not MIPI ones, but on a separate page of
registers. So page 2 register 1 isn't MIPI_DCS_SOFT_RESET, that is page 0
register 1.

Got it -- thanks for the explanation.

In that case,

Reviewed-by: Jessica Zhang <quic_jesszhan@xxxxxxxxxxx>

Thanks,

Jessica Zhang


John.




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