Add DDR controller node which will be used by EDAC driver later, also
move the DDR PMU node as the subnode of the DDR controller.
Signed-off-by: Ye Li <ye.li@xxxxxxx>
Signed-off-by: Xu Yang <xu.yang_2@xxxxxxx>
---
arch/arm64/boot/dts/freescale/imx93.dtsi | 18 ++++++++++++++----
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 6f85a05ee7e1..992bdeef70cd 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -917,10 +917,20 @@ media_blk_ctrl: system-controller@4ac10000 {
status = "disabled";
};
- ddr-pmu@4e300dc0 {
- compatible = "fsl,imx93-ddr-pmu";
- reg = <0x4e300dc0 0x200>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ ddr: memory-controller@4e300000 {
+ compatible = "simple-mfd";
+ reg = <0x4e300000 0x2000>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ ddr-pmu@4e300dc0 {
+ compatible = "fsl,imx93-ddr-pmu";
+ reg = <0x4e300dc0 0x200>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ };
};
};
};
--
2.34.1
