Mailbox controller present in the IPQ SoCs takes the GPLL0 clock also as
an input. Document the same.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@xxxxxxxxxxx>
---
Changes in V2:
- Pick up the R-b tag
---
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
index d2e25ff6db7f..a38413f8d132 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
@@ -125,10 +125,12 @@ allOf:
items:
- description: primary pll parent of the clock driver
- description: XO clock
+ - description: GCC GPLL0 clock source
clock-names:
items:
- const: pll
- const: xo
+ - const: gpll0
- if:
properties:
--
2.34.1
