On Monday 22 December 2014 17:40:30 Murali Karicheri wrote:
> On 12/22/2014 05:24 PM, Arnd Bergmann wrote:
> > On Monday 22 December 2014 16:40:43 Murali Karicheri wrote:
> >>>> +++ b/arch/arm/mm/dma-mapping.c
> >>>> @@ -2052,9 +2052,10 @@ void arch_setup_dma_ops(struct device *dev, u64
> >>>> dma_base, u64 size,
> >>>> struct iommu_ops *iommu, bool coherent)
> >>>> {
> >>>> struct dma_map_ops *dma_ops;
> >>>> + u64 temp_size = min((*(dev->dma_mask) + 1), size);
> >>>>
> >>>> dev->archdata.dma_coherent = coherent;
> >>>> - if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu))
> >>>> + if (arm_setup_iommu_dma_ops(dev, dma_base, temp_size, iommu))
> >>>>
> >>>> If you agree, I will post v1 of the patch with these updates. Let me
> >>>> know. I did some basic tests on Keystone with these changes and it works
> >>>> fine.
> >>>
> >>> It's not exactly what I meant. My main point was that we need to limit
> >>> dev->dma_mask to (size-1) here, but you are not touching that.
> >>
> >> if you mean overriding the dev->dma_mask to min((*dev->dma_mask),
> >> size-1), then I am getting the error "Coherent DMA mask 0x7fffffff (pfn
> >> 0x780000-0x800000) covers a smaller range of system memory than the DMA
> >> zone pfn 0x0-0x880000) when the devices on Keystone tries to set the dma
> >> mask. Something wrong and I need to look into the code.
> >
> > Right, it sounds like the offset was applied incorrectly at some point.
> >
> > What are the DMA zone size and the phys-offset?
> 2G and 0x8_0000_0000. This limit the usable DMA size to 2G on Keystone,
> I believe you shouldn't be limiting the dma mask to size-1 in this case,
> right? The DT setup the dma-range to have a size of 2G (0x80000000).
No, the problem is something else: the pfn range that we calculate for the
coherent DMA mask should have been 0x800000-0x880000, not 0x780000-0x800000,
so we would exactly match the ZONE_DMA.
Arnd
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