On Tue, 5 Sep 2023 10:59:33 +0800 杨明金 <magicyangmingjin@xxxxxxxxx> wrote: > > > > > +static int sprd_adc_enable(struct sprd_adc_data *data, int channel) > > > > > +{ > > > > > + int ret = 0; > > > > > + u32 reg_read = 0; > > > > > + > > > > > + if (data->pm_data.clk_regmap) { > > > > > + ret = regmap_update_bits(data->pm_data.clk_regmap, data->pm_data.clk_reg, > > > > > + data->pm_data.clk_reg_mask, > > > > > + data->pm_data.clk_reg_mask); > > > > > + ret |= regmap_read(data->pm_data.clk_regmap, data->pm_data.clk_reg, ®_read); > > > > > + if (ret) { > > > > > + dev_err(data->dev, "failed to enable clk26m, channel %d\n", channel); > > > > > + return ret; > > > > > + } > > > > > + dev_dbg(data->dev, "enable clk26m: ch %d, reg_read 0x%x\n", channel, reg_read); > > > > > > > > Directly accessing the regmap of a clock seems unusual. Why not provide generic clock interfaces > > > > for this? > > > > > > This register is used to vote to enable/disable the pmic 26m clk which > > > is provided to modules like audio, typec and adc. > > > Therefore, this clk cannot be disabled or enabled directly. > > > > clk_enable() and friends support reference counted enable and disable > > so I don't understand why this needs something unusual. > > Through communication with internal clk colleagues, > I learned that this register is not a traditional eb register, eb? Sorry, I'm not familiar with the term. > so the current clk driver is not configured to support this. > > Jonathan Cameron <jic23@xxxxxxxxxx> 于2023年9月3日周日 19:14写道: > > > > On Wed, 30 Aug 2023 15:15:12 +0800 > > 杨明金 <magicyangmingjin@xxxxxxxxx> wrote: > >